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  typical connection high and low side driver features ? floating channel designed for bootstrap operation fully operational to +600v tolerant to negative transient voltage dv/dt immune ? gate drive supply range from 5 to 20v ? undervoltage lockout for both channels ? 3.3v, 5v and 15v input logic compatible ? matched propagation delay for both channels ? logic and power ground +/- 5v offset. ? lower di/dt gate driver for better noise immunity ? outputs in phase with inputs packages IR2301(s) 8 lead pdip 8 lead soic www.irf.com 1 IR2301 v cc v b v s ho lo com hin lin up to 600v to load v cc lin hin data sheet no. pd60201-b (refer to lead assignments for correct pin con- figuration). this/ these diagram(s) show electrical connections only. please re- fer to our appli- cation notes and designtips for proper circuit board layout. description the IR2301 (s) are high voltage, high speed power mosfet and igbt drivers with inde- pendent high and low side referenced output channels. proprietary hvic and latch immune cmos technologies enable ruggedized mono- lithic construction. the logic input is compatible with standard cmos or lsttl output, down to 3.3v logic. the output drivers feature a high pulse current buffer stage designed for mini- mum driver cross-conduction. the floating channel can be used to drive an n-channel power mosfet or igbt in the high side con- figuration which operates up to 600 volts. part input logic cross- conduction prevention logic dead-time ground pins 2106/2301 com 21064 hin/lin no none vss/com 2108 internal 540ns com 21084 hin/lin yes programmable 0.54~5 s vss/com 2109/2302 internal 540ns com 21094 in/sd yes programmable 0.54~5 s vss/com 2106/2301//2108//2109/2302/2304 feature comparison 2304 hin/lin yes internal 100ns com
IR2301 ( s ) 2 www.irf.com symbol definition min. max. units v b high side floating absolute voltage -0.3 625 v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v cc low side and logic fixed supply voltage -0.3 25 v lo low side output voltage -0.3 v cc + 0.3 v in logic input voltage com - 0.3 v cc + 0.3 dv s /dt allowable offset supply voltage transient ? 50 v/ns p d package power dissipation @ t a +25 c (8 lead pdip) ? 1.0 (8 lead soic) ? 0.625 rth ja thermal resistance, junction to ambient (8 l ead pdip) ? 125 (8 lead soic) ? 200 t j junction temperature ? 150 t s storage temperature -50 150 t l lead temperature (soldering, 10 seconds) ? 300 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. v c c/w w note 1: logic operational for v s of -5 to +600v. logic state held for v s of -5v to -v bs . (please refer to the design tip dt97-3 for more details). recommended operating conditions the input/output logic timing diagram is shown in figure 1. for proper operation the device should be used within the recommended conditions. the v s offset rating is tested with all supplies biased at 15v differential. vb high side floating supply absolute voltage v s + 5 v s + 20 v s high side floating supply offset voltage note 1 600 v ho high side floating output voltage v s v b v cc low side and logic fixed supply voltage 5 20 v lo low side output voltage 0 v cc v in logic input voltage com v cc t a ambient temperature -40 150 c v symbol definition min. max. units
IR2301 ( s ) www.irf.com 3 dynamic electrical characteristics v bias (v cc , v bs ) = 15v, c l = 1000 pf, t a = 25 c. symbol definition min. typ. max. units test conditions t on turn-on propagation delay ? 220 300 v s = 0v t off turn-off propagation delay ? 200 280 v s = 0v or 600v mt delay matching, hs & ls turn-on/off ? 0 50 t r turn-on rise time ? 130 220 v s = 0v t f turn-off fall time ? 50 80 v s = 0v nsec static electrical characteristics v bias (v cc , v bs ) = 15v, and t a = 25 c unless otherwise specified. the v il , v ih and i in parameters are referenced to com and are applicable to the respective input leads. the v o , i o and ron parameters are referenced to com and are applicable to the respective output leads: ho and lo. symbol definition min. typ. max. units test conditions v ih logic ?1? input voltage 2.9 ? ? v cc = 10v to 20v v il logic ?0? input voltage ? ? 0.8 v cc = 10v to 20v v oh high level output voltage, v bias - v o ? 0.8 1.4 i o = 20 ma v ol low level output voltage, v o ? 0.3 0.6 i o = 20 ma i lk offset supply leakage current ? ? 50 v b = v s = 600v i qbs quiescent v bs supply current 20 60 100 v in = 0v or 5v i qcc quiescent v cc supply current 50 120 190 v in = 0v or 5v i in+ logic ?1? input bias current ? 5 20 v in = 5v i in- logic ?0? input bias current ? ? 2 v in = 0v v ccuv+ v cc and v bs supply undervoltage positive 3.3 4.1 5 v bsuv+ going threshold v ccuv- v cc and v bs supply undervoltage negative 3 3.8 4.7 v bsuv- negative going threshold v ccuvh hysteresis 0.1 0.3 ? v bsuvh i o+ output high short circuit pulsed current 120 200 ? v o = 0v, pw 10 s i o- output low short circuit pulsed current 250 350 ? v o = 15v, pw 10 s v a ma v
IR2301 ( s ) 4 www.irf.com lead definitions symbol description hin logic input for high side gate driver output (ho), in phase lin logic input for low side gate driver output (lo), in phase v b high side floating supply ho high side gate drive output v s high side floating supply return v cc low side and logic fixed supply lo low side gate drive output com low side return functional block diagrams lin uv detect delay com lo vcc hin vs ho vb pulse filter hv level shifter r r s q uv detect pulse generator vss/com level shift vss/com level shift
IR2301 ( s ) www.irf.com 5 lead assignments 8 lead pdip 8 lead soic IR2301 IR2301s 1 2 3 4 8 7 6 5 v cc hin lin com v b ho v s lo 1 2 3 4 8 7 6 5 v cc hin lin com v b ho v s lo figure 3. delay matching waveform definitions hin lin ho 50% 50% 10% lo 90% mt ho lo mt figure 1. input/output timing diagram hin lin ho lo figure 2. switching time waveform definitions hin lin t r t on t f t off ho lo 50% 50% 90% 90% 10% 10%
IR2301 ( s ) 6 www.irf.com 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-on propagation delay (ns) typ. max. 0 100 200 300 400 500 600 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-off propagation delay (ns) typ. max. figure 4a. turn-on propagation delay vs. temperature figure 4b. turn-on propagation delay vs. supply voltage figure 5a. turn-off propagation delay vs. temperature figure 5b. turn-off propagation delay vs. supply volta ge 100 200 300 400 500 600 700 800 5101520 supply voltage (v) turn-on propagation delay (ns ) typ. max. 100 200 300 400 500 600 700 5101520 supply voltage (v) turn-off propagation delay (ns) typ. max.
IR2301 ( s ) www.irf.com 7 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-on rise time (ns ) typ. max. 0 50 100 150 200 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-off fall time (ns) typ. max. figure 6a. turn-on rise time vs. temperature figure 6b. turn-on rise time vs. supply voltage figure 7a. turn-off fall time vs. temperature figure 7b. turn-off fall time vs. supply volta ge 0 100 200 300 400 500 600 700 5101520 supply voltage (v) turn-on rise time (ns ) typ. max. 0 50 100 150 200 5101520 supply voltage (v) turn-off fall time (ns) typ. max.
IR2301 ( s ) 8 www.irf.com 0 1 2 3 4 5 6 -50-25 0 25 50 75100125 temperature ( o c) logic "1" input voltage (v) max. 0 1 2 3 4 5 6 5101520 supply voltage (v) logic "1" input voltage (v) max. 0 1 2 3 4 5 6 -50-25 0 25 50 75100125 temperature ( o c) logic "0" input voltage (v) mi n. 0 1 2 3 4 5 6 5101520 supply voltage (v) logic "0" input voltage (v) mi n. figure 8a. logic ?1? input voltage vs. temperature figure 8b. logic ?1? input voltage vs. supply voltage figure 9a. logic ?0? input voltage vs. temperature figure 9b. logic ?0? input voltage vs. supply volta ge
IR2301 ( s ) www.irf.com 9 0 1 2 3 4 -50-25 0 25 50 75100125 temperature ( o c) high level output voltage (v) max. typ. 0.0 0.5 1.0 1.5 2.0 -50 -25 0 25 50 75 100 125 temperature ( o c) low level output voltage (v) max. typ. figure 10a. high level output voltage vs. temperature figure 10b. high level output voltage vs. supply voltage figure 11a. low level output voltage vs. temperature figure 11b. low level output voltage vs. supply volta ge 0 1 2 3 4 5 6 5101520 supply voltage (v) high level output voltage (v) typ. max. 0.0 0.5 1.0 1.5 2.0 5101520 supply voltage (v) low level output voltage (v) typ. max.
IR2301 ( s ) 10 www.irf.com 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) offset supply leakage current ( a) max. 0 100 200 300 400 500 100 200 300 400 500 600 of f set supply voltage (v) offset supply leakage current ( a) max. 0 50 100 150 200 -50 -25 0 25 50 75 100 125 temperature ( o c) quiescent v bs supply current ( a) mi n. typ. max. 0 50 100 150 200 5101520 v bs supply voltage (v) quiescent v bs supply current ( a) typ. max. mi n. figure 12a. offset supply leakage current vs. temperature figure 12b. offset supply leakage current vs. supply voltage figure 13a. quiescent v bs supply current vs. temperature figure 13b. quiescent v bs supply current vs. supply volta ge
IR2301 ( s ) www.irf.com 11 0 100 200 300 400 -50 -25 0 25 50 75 100 125 temperature ( o c) quiescent v cc supply current ( a) mi n. typ. max. 0 100 200 300 400 5101520 v cc supply voltage (v) quiescent v cc supply current ( a) typ. max. mi n. 0 10 20 30 40 50 60 -50-250 255075100125 temperature ( o c) logic "1" input bias current ( a) typ. max. figure 14a. quiescent v cc supply current vs. temperature figure 14b. quiescent v cc supply current vs. v cc supply voltage figure 15a. logic ?1? input bias current vs. temperature figure 15b. logic ?1? input bias current vs. supply volta ge 0 10 20 30 40 50 5101520 supply voltage (v) logic "1" input bias current ( a) typ. max.
IR2301 ( s ) 12 www.irf.com 0 1 2 3 4 5 -50-25 0 25 50 75100125 temperature ( o c) logic "0" input bias current ( a) max. 0 1 2 3 4 5 5101520 supply voltage (v) logic "0" input bias current ( a) max. 2 3 4 5 6 -50-25 0 25 50 75100125 temperature ( o c) v cc and v bs undervoltage threshold (+) (v) mi n. typ. max. 2 3 4 5 6 -50 -25 0 25 50 75 100 125 temperature ( o c) v cc and v bs undervoltage threshold (-) (v) mi n. typ. max. figure 16a. logic ?0? input bias current vs. temperature figure 16b. logic ?0? input bias currentt vs. supply voltage figure 17. v cc and v bs undervoltage threshold (+) vs. temperature figure 18. v cc and v bs undervoltage threshold (-) vs. temperature
IR2301 ( s ) www.irf.com 13 0 100 200 300 400 -50 -25 0 25 50 75 100 125 temperature ( o c) output source current (ma) mi n. typ. 0 100 200 300 400 500 600 -50 -25 0 25 50 75 100 125 temperature ( o c) output sink current (ma ) mi n. typ. figure 19a. output source current vs. temperature figure 19b. output source current vs. supply voltage figure 20a. output sink current vs. temperature figure 20b. output sink current vs. supply volta ge 0 100 200 300 400 5101520 supply voltage (v) output source current (ma) typ. mi n. 0 100 200 300 400 500 600 5101520 supply voltage (v) output sink current (ma ) typ. mi n.
IR2301 ( s ) 14 www.irf.com -12 -10 -8 -6 -4 -2 0 5101520 v bs floating supply voltage (v) maximum v s negative offset (v) typ. 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temprature ( o c) 70v figure 22. IR2301 vs. frequency (irfbc20), r gate =33 ? , v cc =15v 140v 0v figure 21. maximum v s negative offset vs. v bs floating supply voltage 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 0v 70v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 1 40v 70v 0v figure 24. IR2301 vs. frequency (irfbc40), r gate =15 ? , v cc =15v figure 23. IR2301 vs. frequency (irfbc30), r gate =22w, v cc =15v
IR2301 ( s ) www.irf.com 15 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) figure 25. IR2301 vs. frequency (irfpe50), r gate =10 ? , v cc =15v 0v 1 40v 70v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 1 40v 70v 0v figure 27. IR2301s vs. frequency (irfbc30), r gate =22 ? , v cc =15v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) figure 26. IR2301s vs. frequency (irfbc20), r gate =33 ? , v cc =15v 0v 70v 140v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 0v figure 28. IR2301s vs. frequency (irfbc40), r gate =15 ? , v cc =15v 140v 70v
IR2301 ( s ) 16 www.irf.com case outlines 01-6014 01-3003 01 (ms-001ab) 8 lead pdip 20 40 60 80 100 120 140 1101001000 frequency (khz) tempreture ( o c) figure 29. IR2301s vs. frequency (irfpe50), r g ate =10 ? , v cc =15v 140v 70v 0v
IR2301 ( s ) www.irf.com 17 01-6027 01-0021 11 (ms-012aa) 8 lead soic 87 5 65 d b e a e 6x h 0.25 [.010] a 6 4 3 12 4. outline conforms to jedec outline ms-012aa. notes: 1. dimensioning & toleranc ing per asme y14.5m-1994. 2. controlling dimension: millimeter 3. dimensions are shown in millimeters [inches]. 7 k x 45 8x l 8x c y footprint 8x 0.72 [.028] 6.46 [.255] 3x 1.27 [.050] 8x 1.78 [.070] 5 dimension does not include mold protrusions. 6 dimension does not include mold protrusions. mold protrusions no t to exc eed 0.25 [.010]. 7 dimension is the length of lead for soldering to a substrate. mold protrusions no t to exc eed 0.15 [.006]. 0.25 [.010] cab e1 a a1 8x b c 0.10 [.004] e1 d e y b a a1 h k l .189 .1497 0 .013 .050 basic .0532 .0040 .2284 .0099 .016 .1968 .1574 8 .020 .0688 .0098 .2440 .0196 .050 4.80 3.80 0.33 1.35 0.10 5.80 0.25 0.40 0 1.27 basic 5.00 4.00 0.51 1.75 0.25 6.20 0.50 1.27 min max millimeters in c h e s min max dim 8 e c .0075 .0098 0.19 0.25 .025 basic 0.635 basic ir world headquarters: 233 kansas street, el segundo, california 90245 tel: (310) 252-7105 data and specifications subject to change without notice. 7/8/2003


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